跳到正文
半导体开放世界
论文

Effect of Wafer Level Underfill on the Microbump Reliability of Ultrathin-Chip Stacking Type 3D-IC Assembly during Thermal Cycling Tests

Chang-Chun Lee

本站引用的位置11 处,涉及 2 个知识点

  1. §2.1,图1–2,article pp.2–3/13

  2. §2.1,图1,article p.2/13

  3. §2.1,图2,article pp.2–3/13

  4. §2.1、§3.3,图2、8,article pp.2–3、7–8/13

  5. §3.2,表1,article pp.5–6/13

  6. §3.2,article pp.5–6/13

  7. §3.3,图8,article pp.7–8/13

  8. §4.1–4.4,article pp.8–11/13

  9. §4.1,图9,article pp.8–9/13

  10. §4.3–4.4,图11–12,article pp.10–11/13

  11. §4.3,图11,article p.10/13